Synopsys logo12/17/2022 The Synopsys PrimeSim ™ HSPICE ®, PrimeSim SPICE, PrimeSim Pro and PrimeSim XA simulators, as part of the PrimeSim Continuum solution, deliver improved turnaround time for TSMC 3nm designs and provide signoff coverage for circuit simulation and reliability requirements. Numerous enhancements to Custom Compiler, validated by early 3nm users including the Synopsys DesignWare® IP team, reduce the effort to meet 3nm technology requirements. The Custom Compiler ™ design and layout solution, part of the Synopsys Custom Design Platform, delivers improved productivity to designers using TSMC advanced process technologies. These new technologies, which result from the strategic partnership between the companies, will help provide a PPA boost for designs on TSMC's N3 process. To support TSMC's ultra-low-voltage design closure, the Synopsys optimization engine has been improved to use new footprint optimization algorithms. The platform has been enhanced to deliver improved synthesis and global placer engines that optimize library cell selection and placement results. The digital design flow, anchored by the tightly integrated Synopsys Fusion Design Platform ™, features new technologies to ensure faster timing closure, full-flow correlation from synthesis to place-and-route to timing, as well as physical signoff. "Through our strategic collaboration, we are enabling our customers to achieve next-generation HPC, mobile, 5G and AI designs and quickly launch their product innovations to the market." "We're pleased to see the results of our multi-year collaboration with Synopsys and the certification of their design platform solutions on TSMC's most advanced processes that deliver optimized PPA," said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. In addition to this certification, Synopsys' digital and custom design platforms have also been certified for TSMC's N4 process. The certification with rigorous validation, based on TSMC's latest version of the design rule manual (DRM) and process design kits (PDKs), is the result of a multi-year collaboration between the two companies. In a continuing effort to optimize power, performance and area (PPA) for next-generation system-on-chips (SoCs), Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC has certified the Synopsys digital and custom design platforms for TSMC's 3nm technology.
0 Comments
Leave a Reply.AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |